Prerequisite

• ECTC Introduction
• Computer Vocabulary
• Base n Arithmetic

Of course these tutorials may also have their own prerequisites.

General (Section 1)

This tutorial concerns the details of coding ECTC assembly language into machine language and (vice versa) decoding machine language back into assembly language.

It also deals with the English meanings of assembly language as well.

Several principles are important:

• The word instruction means algorithm step.
• Each assembly language instruction translates into one machine language instruction - this translation is called coding.
• Each machine language instruction step translates into one assembly language instruction - this translation is called decoding.
• Machine language is usually written by people in hexidecimal, even though it is actually stored in binary inside the computer.
• Assembly language is usually written by people in decimal.
• ML is short for Machine Language.
• AL is short for Assembly Language.
• The ECTC ML instruction is 2 bytes long (there is one exception).
• Thus the ECTC ML instruction is 4 hex digits long.
• There are several different coding schemes for different kinds of instruction. These are known as instruction formats.

There are seven instruction formats - each slightly different. Each is the subject of a major section of this tutorial. See the navigator frame for more information. There is also a short (but cryptic) summary.

Register-Operand Format (Section 2)

This format includes all the truly binary operations available on the ECTC except for those that use two registers. Its left operand is always a general purpose register. Its right operand is either the content of a memory cell or an 8 bit constant.

A register operand instruction is composed of four pieces of information each represented by a code number:

In addition these codes numbers must be combined together in a certain way to make the ML instruction.

Binary Operation Code (2.1)

The Register-Operand type of instruction specifies exactly one binary operation to be performed on two operands - this is called the operation code (or op code for short).

The left operand will always be one of the registers a, b, x, or y.

There can be several kinds of right operand - but it is often the content of a memory cell.

An example in AL would be:

add b,21

which means add the content of memory cell 21 to the content of register b. Actually memory cell 21 should really be called memory cell 15. The 21 is decimal because it appears in an assembly language instruction. The 15 is the true address because we talk about machine language stuff using hex numbers.

In this example, the op code (in assembly) is add and the left operand is the register b and the right operand is the content of memory cell 15.

In general the binary operation must be one of the following. Most of the arithmetic or logic operations set the value of the fg register .

Consult the tutorial Base-n Arithmetic for the details of how these operations are actually performed. In particular you will need to read about the Binary Logic operations and the Multiply, Divide and Mod operations. The multiply, divide, and mod operations are done with signed binary.

Notice that many of the binary operations also record a result in the flags register. Note which ones do not.

Register Code (2.2)

In the Register-Operand format, the left operand is always one of the general purpose registers a, b, x, or y. These have the following two bit codes:

Note that this register code is only half of a hex digit. Furthermore, it will be the right half of a hex digit.

Mode Code (2.3)

• The content of a cell in memory - this is called direct addressing mode
• The value of a number actually in the instruction - this is called immediate addressing mode
• The content of a cell in memory whose address is computed using the x register - this is called indexed by x addressing mode.
• The content of a cell in memory whose address is computed using the y register - this is called indexed by y addressing mode.

Which choice from above has been made for a particular ML instruction is represented by a mode code - which is a two bit code number as follows:

• 00 : Direct addressing
• 01 : Immediate addressing
• 10 : Indexed by x addressing
• 11 : Indexed by y addressing

Note that this mode code is only half of a hex digit. Furthermore, it will be the left half and so the value it contributes to the hex digit will be four times what you see above.

In AL, the mode is represented by symbols written near the second operand. This works as follows:

• no symbol means direct addressing
• prefixed # means immediate addressing
• suffixed [x] means indexed by x addressing
• suffixed [y] means indexed by y addressing

Putting this altogether into one table (where opd is a generic right operand) gives:

Operand Code (2.4)

The right operand of a Register-Operand format ML instruction is either a memory cell or an actual data value as determined by the mode code of the instruction.

You may wish to reveiw the concepts of memory content versus memory address .

In either case the operand is written in decimal for AL and in hexidecimal for ML.

Thus coding an instruction involves translating from decimal to hexidecimal and decoding an instruction involves translating from hexidecimal to decimal. Consult the tutorial Base-n Numbers for review.

When the mode code is direct, indexed by x, or indexed by y, then the operand code is interpreted as a memory address.

In the case of direct mode, the operand code is the address of the memory cell and the operand is the content of that memory cell.

In the case of indexed by x or indexed by y modes, the operand code is combined with the content of the x or y register to get the actual address of the memory cell. The operand will again be the content of that memory cell.

However, in the case of immediate mode, the operand code is the operand value. No memory cell is involved (except, of course, the memory cell which held the instruction byte in the first place). In other words the operand is not the content of a memory cell - but is instead equal to the operand code itself.

This confuses many students - so a concrete example is provided here in assembly language. Consider the two AL instructions

add a,6
add b,#6

The first of these uses direct mode because there is no special symbol near the operand code 6.

The second one uses immediate mode because of the # symbol next to the operand code 6

The operand code is 6 in both cases. So let us suppose we know the content of some of the registers and memory cells. In particular let us assume that:

• All content and address numbers will be written as two digit hex numbers.
• The content of register a is 03
• The content of register b is 02
• The memory cell with address 06 has content 14.

Then the first instruction above uses direct mode to look in memory cell number 6 - sees the content 14 and adds that content to register a so that register a is now 03+14 = 17.

However the second instruction above uses immediate mode and immediately sees the operand code 06 and so it adds that code to register b so that register b is now 02+06 = 08. This did not involve looking at the content of a memory cell.

In summary, using direct mode uses the operand code as an address - whereas using immediate mode uses the operand code as a value.

Combining the Register-Operand Codes (2.5)

Once the codes for all the parts of a Register-Operand format instruction have been worked out, they will need to be put together. The parts were (see above):

• op code - this is four bits = one hex digit
• register code - this is two bits = half a hex digit
• mode code - this is two bits = half a hex digit
• operand code - this is eight bits = two hex digits

Thus all in all there are 4+2+2+8 = 16 bits = 4 hex digits = 2 bytes.

They are put together into an ML instruction as follows:

1. The op code goes first - it is the first (leftmost) hex digit of the instruction
2. The register and mode codes are combined into one hex digit - it is the second hex digit of the instruction.
3. The operand code goes last - it gives the third and fourth hex digits of the instruction.

For example, consider coding the following AL instruction:

sub b,34[x]

First, you must work out the individual hex codes for the parts of the instruction:

1. The AL opcode is sub. Consulting the binary opcode table, you find out its ML code is 4.
2. The left operand is the register b. Consulting the general register code table, you find out its ML code is 1. This will be part of the second digit of the ML instruction.
3. Because of the [x], you see the mode is indexed by x. Consulting the mode code table, you find out its ML code is 8.
4. The register code and mode code must be combined into a single hex digit. This is done by adding them together. Thus the combined reg/mode code is 1+8 = 9. This combination will be the second digit of the ML instruction.
5. The AL operand code is 34. But that is decimal. For ML it needs to be translated into hex. You get 22₁₆ as the base 16 translation of the decimal 34. These two digits become the third and fourth digits of the ML instruction.

Summarizing this work you have:

Thus the translation of the AL instruction

sub b,34[x]

into ML is:

49 22

which is the information in the leftmost column of the work table above.

The handy little table below shows all the ways of combining the register codes (left margin of table) with the mode codes (top margin of table) to get a single combination reg/mode code:

In the example above, the register was b and the mode was _[x] and so selecting the b row of the t able and the _[x] column, you see the resulting reg/mode code 9 at the shaded blue intersection

Indexed by x Addressing Mode (2.6)

Beginners and ignore this section.

This addressing mode is similar to direct addressing mode, but selects a memory cell as an operand by specifying its address as the (8 bit) sum of two values.

The first of these values is in the second (IR1) byte of the instruction. The second of these values is in the x register. Note that any carryout bit from the addition is discarded since addresses are limited to 8 bits.

In Assembly language, one just writes the address of the memory cell (in decimal) followed by [x]. For example:

and b,49[x]

     69 31

• The 6 is the operation code for and.
• The 9 is a combination of the indexed by x addressing mode (coded as 8) plus the code for register b (which is 1).
• The 31 is the hexidecimal code for the address 49.

Indexed by y Addressing Mode (2.7)

Beginners can ignore this section.

This addressing mode is the same as Indexed by x except that register y is used as the address offset. This selects a memory cell as an operand by specifying its address as the (8 bit) sum of two values. The first of these values is in the second (IR1) byte of the instruction. The second of these values is in the y register. Note that any carryout bit from the addition is discarded since addresses are limited to 8 bits.

In Assembly language, one just writes the address of the memory cell (in decimal) followed by [y]. For example:

     store b,81[y]

     2D 51

• The 2 is the operation code for store.
• The D is a combination of the indexed by y addressing mode (coded as C) plus the code for register b (which is 1).
• The 51 is the hexidecimal code for the address 81.

Register-Register Format (Section 3)

This format includes all but two of the binary operations available on the ECTC that work on two registers. Both of its register operands can be any of the programmable registers.

A register operand instruction is composed of four pieces of information each represented by a code number:

       The hex digit F which is an escape code signalling Register-Register format..
       Which binary operation is involved - known as the binary opcode
                 This uses the same code as a Register-Operand instruction opcode.
       Which left operand is involved - given by a 4 bit register code.
       Which right operand is involved - given by a 4 bit register code.

In addition these codes numbers must be combined together in a certain way to make the ML instruction.

Register Escape (3.1)

The Register-Register ML instruction format is designed to fill a void in the design of the Register-Operand format instructions.

In those instructions the right operand could be a constant or a memory cell located in one of three ways.

However, it would be reasonable to allow a right operand to be a register.

But, this would require five mode codes and so would require that the mode code be three bits long instead of two. The resulting ML instruction would then have seventeen bits instead of sixteen and thus would not longer neatly fit in two bytes.

Hence the Register-Operand format is left unchanged and a new format was created to fill the need for both operands to be registers.

However, this new format must somehow be distinguished from the more usual Register-Operand format.

This distinction is signalled by a trick known as an escape code.

Notice in the opcode table for Register-Operand instructions that the hex digit F does not code any of the binary operations. Thus its use for the opcode digit (first digit of a Register-Operand ML instruction) would be a mistake if the intent were to code such an instruction. Since the F cannot be used for a Register-Operand instruction, that means it is free for use in some other purpose. Thus it is free to be used as a signal of a different instruction format.

The appearance of an F in the first digit of an ML instruction is thus an escape code that means that the Register-Register format should be used. It means one should not use the Register-Operand format.

Register Code (3.2)

In the Register-Register format, each operand is one of the programmable registers. These have the following four bit codes:

Note that this kind of register code is a full hex digit. That is why more registers can be specified than with the two bit register code used in a Register-Operand format instruction.

In fact, there could have been sixteen registers listed in the table. The unused eight slots are reserved for future redesign of the ECTC.

Combining the Register-Register Codes (3.3)

Once the codes for all the parts of a Register-Register format instruction have been worked out, they will need to be put together. The parts were (see above):

• escape code - this is one hex digit
• op code - this is one hex digit
• left register code - this is one hex digit
• right register code - this is one hex digit

Thus all in all there are 4 hex digits = 2 bytes.

They are put together into an ML instruction as follows:

1. The escape code F goes first - it is the first (leftmost) hex digit of the instruction
2. The op code goes next - it is the second hex digit of the instruction.
3. The left register code goes next - it is the third hex digit of the instruction.
4. The right register code goes last - it gives the fourth hex digits of the instruction.

For example, consider coding the following AL instruction:

div b,sp

First, you must work out the individual hex codes for the parts of the instruction:

1. The AL opcode is div. Consulting the binary opcode table, you find out its ML code is A.
2. The left operand is the register b. Consulting the programmable register code table, you find out its ML code is 1.
3. The right operand is the register sp. Consulting the programmable register code table, you find out its ML code is 4.

Summarizing this work you have:

Thus the translation of the AL instruction

div b,sp

into ML is:

FA 14

which is the information in the leftmost column of the work table above.

Unary-Operand (Section 4)

This format includes four of the unary operations available on the ECTC that operate on a constant or memory cell.

A Unary-Operand instruction is composed of four pieces of information each represented by a code number:      

       The hex digit D which is an escape code signalling Unary-Operand format..
       Which unary operation is involved - known as the unary opcode.
       What addressing mode is involved - known as the mode code
                  The mode code here is the same one used in the Register-Operand format.
      What address or data value is involved - known as the operand code.
                  The operand code here is the same one used in the Register-Operand format.

In addition these codes numbers must be combined together in a certain way to make the ML instruction.

Unary Escape (4.1)

The Unary-Operand ML instruction format is designed to fill a void in the design of the Register-Operand format instructions.

In those instructions there were always two operands and the operation was always binary.

However, it would be reasonable to allow some unary operations.

But, this would require five more op codes for a total of 19 and so would require that the op code be five bits long instead of three. The resulting ML instruction would then have seventeen bits instead of sixteen and thus would not longer neatly fit in two bytes.

Hence the size of the opcode is left unchanged and a new format was created to fill the need for unary operations with one operand.

However, this new format must somehow be distinguished from the more usual Register-Operand format.

This distinction is signalled by a trick known as an escape code.

Notice in the opcode table for Register-Operand instructions that the hex digit D does not code any of the binary operations. Thus its use for the opcode digit (first digit of a Register-Operand ML instruction) would be a mistake if the intent were to code such an instruction. Since the D cannot be used for a Register-Operand instruction, that means it is free for use in some other purpose. Thus it is free to be used as a signal for a different instruction format.

The appearance of an D in the first digit of an ML instruction is thus an escape code that means that the Unary-Operand format should be used. It means one should not use the Register-Operand format.

Unary Operation Code (4.2)

The Unary-Operand type of instruction specifies exactly one unary operation to be performed on one operand - this is called the operation code (or op code for short).

There can be several kinds of operand - but it is often the content of a memory cell.

An example in AL would be:

inc 21

which means add one to the content of memory cell 15.

In this example, the op code (in assembly) is inc and the operand is the content of memory cell 15.

Note since assembly is decimal, the 21 is understood to be a decimal number and thus the actual memory cell address is 15₁₆.

In general the unary operation must be one of the following:

Since the ML op code is only two bits, it will only occupy half of a hex digit. It will share the second hex digit of the ML instruction with the mode code - which is also only two bits. The unary op code will be the right half of this digit.

More information on the operation of the push and pop instructions is provided in a later tutorial - ECTC Operation.

The push operation "appends" the value of the operand to the bottom end of the stack

The pop operation "removes" the value at the bottom end of the stack and copies it into the operand.

The AL opcode inc is short for increment which generally means add to. In this case it means add one to.

The AL opcode dec is short for decrement which generally means subtract from. In this case it means subtract one from.

There is another unary operation - neg - that is only available in the Unary-Register format instructions.

Combining the Unary-Operand Codes (4.3)

Once the codes for all the parts of a Unary-Operand format instruction have been worked out, they will need to be put together. The parts were (see above):

• escape code - this is one hex digit
• op code - this is two bits = half a hex digit
• mode code - this is two bits = half a hex digit
• operand code - this is eight bits = two hex digits

Thus all in all there are 4+2+2+8 = 16 bits = 4 hex digits = 2 bytes.

They are put together into an ML instruction as follows:

1. The escape code D goes first - it is the first (leftmost) hex digit of the instruction
2. The op code and mode codes are combined into one hex digit - it is the second hex digit of the instruction.
3. The operand code goes last - it gives the third and fourth hex digits of the instruction.

For example, consider coding the following AL instruction:

inc 34[y]

First, you must work out the individual hex codes for the parts of the instruction:

1. The AL opcode is inc. Consulting the unary opcode table, you find out its ML code is 2.
2. Because of the [y], you see the mode is indexed by y. Consulting the mode code table, you find out its ML code is C.
3. The register code and mode code must be combined into a single hex digit. This is done by adding them together. Thus the combined reg/mode code is 2+C = E. This will be the second digit of the ML instruction.
4. The AL operand code is 34. But that is decimal. For ML it needs to be translated into hex. You get 22₁₆ as the base 16 translation of the decimal 34. These two digits become the third and fourth digits of the ML instruction.

Summarizing this work you have:

Thus the translation of the AL instruction

inc 34[y]

into ML is:

DE 22

which is the information in the leftmost column of the work table above.

The handy little table below shows all the ways of combining the unary codes (left margin of table) with the mode codes (top margin of table) to get a single combination op/mode code:

In the example above, the operation was inc and the mode was _[y] and so selecting the inc row of the t able and the _[y] column, you see the resulting op/mode code E at the shaded blue intersection

Unary-Register (Section 5)

This format include all of the unary operations available on the ECTC that operate on a programmable register.

A Unary-Register instruction is composed of four pieces of information each represented by a code number:

       The hex digit F which is an escape code signalling xxx-Register format..
       The hex digit D which is another escape code signalling Unary-Register format..
       Which unary operation is involved - known as the unary opcode.
       Which operand is involved - given by a 4 bit register code.

In addition these codes numbers must be combined together in a certain way to make the ML instruction.

Register & Unary Escape (5.1)

The Unary-Register ML instruction format is designed to fill a void in the design of the Unary-Operand format instructions.

In those instructions the operand was always a constant or a memory cell.

However, it would be reasonable to allow the operand to be a register.

But, that would require adding more bits to the operand codes.

Hence the size of the opcode is left unchanged and a new format was created to fill the need for unary operations with a register operand.

However, this new format must somehow be distinguished from the more usual Unary-Operand format.

This distinction is signalled by a trick known as an escape code. However, the Unary-Operand format already uses an escape code D. Thus an additional register escape code F will be required in front of the D escape code.

Normally the F would signal a Register-Register binary opcode format instruction. However, none of the binary opcodes use a D - and so it is safe to use the D for the unary escape.

The appearance of FD in the first two digits of an ML instruction is thus an escape code sequence that means that the Unary-Register format should be used.

Unary Operation Code (5.2)

The Unary-Operand type of instruction specifies exactly one unary operation to be performed on one operand - this is called the operation code (or op code for short).

In this format the operand is always a programmable register.

An example in AL would be:

inc sp

which means add one to the content of the stack pointer.

In this example, the op code (in assembly) is inc and the operand is the content of the stack pointer.

In general the unary operation must be one of the following:

The ML opcode will be an entire hex digit and so there is room in the ECTC design for eleven more unary operations. The current model of ECTC only defines these five.

More information on the operation of the push and pop instructions is provided in a later tutorial - ECTC Operation.

The push operation "appends" the value of the operand to the bottom end of the stack

The pop operation "removes" the value at the bottom end of the stack and copies it into the operand.

The AL opcode inc is short for increment which generally means add to. In this case it means add one to.

The AL opcode dec is short for decrement which generally means subtract from. In this case it means subtract one from.

The AL opcode neg is short for negate - it means to change the sign of the operand, but not its magnitude. For finary values this means using the twos complement operation. Note that changing the sign of a negative value gives a positive result - so that using neg does not necessarily give a negative answer.

Combining the Unary-Register Codes (5.3)

Once the codes for all the parts of a Unary-Operand format instruction have been worked out, they will need to be put together. The parts were (see above):

• escape code F - this is one hex digit
• escape code D - this is one hex digit
• op code - this is one hex digit
• programmable register code - this is one hex digit

Thus all in all there are 4 hex digits = 2 bytes.

They are put together into an ML instruction as follows:

1. The escape code F goes first - it is the first (leftmost) hex digit of the instruction
2. The escape code D goes next - it is the second hex digit of the instruction
3. The unary op code is next - it is the third hex digit of the instruction.
4. The register code goes last - it is the fourth hex digit of the instruction.

For example, consider coding the following AL instruction:

For example, consider coding the following AL instruction:

neg fg

First, you must work out the individual hex codes for the parts of the instruction:

1. The AL opcode is neg. Consulting the unary opcode table, you find out its ML code is 4.
2. The operand is the register fg. Consulting the programmable register code table, you find out its ML code is 6.Summarizing this work you have:

Thus the translation of the AL instruction

neg fg

into ML is:

FD 46

which is the information in the leftmost column of the work table above.

Register-Constant Format (Section 6)

This format gives the two shift operations on a single register. These are counted as binary operations . The left operand is a register and the right operand is a signed 4 bit constant that specifies the amount of shift. The register operands can be any of the programmable registers. The shift amount can be any one of the signed 4 bit values from -8 to 7.

A register constant instruction is composed of four pieces of information each represented by a code number:

       The hex digit F which is an escape code signalling Register-Register format..
       Which binary operation is involved - known as the binary opcode
                 This will be a special register shift op code - either C or E.
       Which left operand is involved - given by a 4 bit register code.
       Which right operand is involved - given by a 4 bit signed integer .

In addition these codes numbers must be combined together in a certain way to make the ML instruction.

Register Escape (6.1)

The Register-Constant ML instruction format is designed to provide some shift instructions.

The left operand can be any one of the programmable registers. The right operand is a constant that gives the amount to shift. A positive amount means shift right whereas a negative amount means shift left.

This new format fits into an unoccupied position in the Register-Register format which already requires an escape code of F to distinguish it from other formats.

The new format uses that same escape code. It is disinguished from the normal Register-Register format by the fact that the 2nd hex digit of the ML instruction is not one of the usual binary op codes 1 through B. Instead it is either C for arithmetic shifts or E for rotating shifts.

The appearance of an F in the first digit of an ML instruction together with either a C or E in the second digit of the ML instructions tells one that the ML is a Register-Constant instruction.

Some Handy Tables (6.2)

The op codes for shift instructions are different from the usual binary op codes.

The table below simply summarizes the twos complement notation for signed 4 bit quantities.

Note that rather than memorizing this table, you can simple remember to add 16 to negative shift amounts and write in hex.

Combining the Register-Constant Codes (6.3)

Once the codes for all the parts of a Register-Constant format instruction have been worked out, they will need to be put together. The parts were (see above):

• escape code - this is one hex digit
• op code - this is one hex digit
• left register code - this is one hex digit
• right shift amount - this is one hex digit

Thus all in all there are 4 hex digits = 2 bytes.

They are put together into an ML instruction as follows:

1. The escape code F goes first - it is the first (leftmost) hex digit of the instruction
2. The op code goes next - it is the second hex digit of the instruction.
3. The left register code goes next - it is the third hex digit of the instruction.
4. The right shift goes last - it gives the fourth hex digits of the instruction.

For example, consider coding the following AL instruction:

ash sp,-3

First, you must work out the individual hex codes for the parts of the instruction:

1. The AL opcode is ash. Consulting the shift opcode table, you find out its ML code is C.
2. The left operand is the register sp. Consulting the programmable register code table, you find out its ML code is 4.
3. The right operand is the signed constant -3. Consulting the 4 bit twos complement table, you find out its ML code is D.

Summarizing this work you have:

Thus the translation of the AL instruction

ash sp,-3

into ML is:

FC 4D

which is the information in the leftmost column of the work table above.

Shift Operations (6.4)

The ECTC supports two shift operations ash and rot.

These operations move the bits inside the register either to the left or to the right. All the bits are moved the same distance.

The direction and amount of motion is given by the shift amount which is the second constant operand of the shift instruction. A positive shift amount specifies a movement of bits to the right by the indicated amount. A negative shift amount moves bits to the left.

In the rot instruction, those bits that are moved out of the register (i.e. that "fall off" of one end of the register) will reappear at the other end of the register (like playing asteroids or packman). Thus the movement of bits still leaves 8 bits in the register.

In the ash instruction (which stands for arithmetic shift) those bits that are moved out of the register are simply LOST. However, to make up for the lost bits (so that the total number of bits in the register remains equal to 8) some new bits will appear at the other end of the register. How this is done depends on the sign of the shift amount

• When the shift amount is negative, bits are moved toward the left. Bits shifted out of the left end are just lost. The new bits shifted into the right end are always zeros.
• When the shift amount is positive, bits are moved toward the right. Bits shifted out of the right end are just lost. The new bits shifted into the left end are always copies of the sign bit.

Thus the ash instructions works like multiplying or dividing by a power of two. Right shifts divide and left shift multiply. For example the instruction

	ash x,3

As another example, the instruction

	ash y,-2

will multiply register y by 4 because 4 is the 2nd power of 2 and the shift amount was left by 2.

Note that these will be signed divide and multiply operations.

Jump Format (Section 7)

This format covers the conditional and unconditional jump instructions and the procedure support instructions.

A Jump instruction will only have one operand. It is usually the address of another instruction somewhere else in the program. This other instruction is called the target of the jump. However, three of the jump instructions use the operand as a byte count used to manage the stack.

A jump instruction is composed of three pieces of information each represented by a code number:

       The hex digit E which is an escape code signalling the Jump format..
       Which particular jump operation is involved - known as the jump code
       What the jump operand is - given by an 8 bit target address or byte count value.

In addition these codes numbers must be combined together in a certain way to make the ML instruction.

Jump Escape (7.1)

The Jump ML instruction format is designed to provide goto and if-goto instructions.

The operand is a constant that gives the address to transfer control to - except in the enter, leave, and ret instructions where it gives the amount of space (number of bytes) to be adjusted on the stack.

However, this format must somehow be distinguished from the more usual Register-Operand format.

This distinction is signalled by a trick known as an escape code.

Notice in the opcode table for Register-Operand instructions that the hex digit E does not code any of the binary operations. Thus its use for the opcode digit (first digit of a Register-Operand ML instruction) would be a mistake if the intent were to code such an instruction. Since the E cannot be used for a Register-Operand instruction, that means it is free for use in some other purpose. Thus it is free to be used as a signal of a different instruction format.

The appearance of an E in the first digit of an ML instruction is thus an escape code that means that the Jump format should be used. It means one should not use the Register-Operand format.

Jump Code Table (7.2)

The jump codes for the jump instructions are given below - the first table gives conditional jumps and the second table gives other kinds of jump instruction. The conditional jumps depend on the value of the fg register whose value is set by the previous arithmetic or logic operation - typically the cmp instruction.

Jump Operand (7.3)

The only operand of a jump format ML instruction is either the address of another instruction or an actual data value used to manage the stack.

For all but three of the jump instructions, the operand gives the address of the target of the jump - where the CPU will continue execution if the jump is "taken". When the CPU does a jump all that happens is that the target address is loaded into the pc register - thus a jump could also be visualized as the fictitious instruction

load pc,#target

However, for the ret, enter, and leave instructions, the operand is just a byte count used to manage space on the stack. It does this by adding or subtracting a constant from the stack pointer register. The beginner can skip the discussion of these instructions.

For example the instruction

ret 6

does the same work as the (partly fictitious) instructions

pop pc
add sp,#6 ; which removes space from the stack

The instruction

enter 5

does the same work as the (partly fictitious) instructions

push y
load y,sp
sub sp,#5 ; which adds space to the stack

And finally the instruction

leave 7

does the same work as the (partly fictitious) instructions

load sp,y
pop y
pop pc
add sp,#7 ; which removes space from the stack

Combining the Jump Codes (7.4)

Once the codes for all the parts of a Jump format instruction have been worked out, they will need to be put together. The parts were (see above):

• escape code - this is one hex digit
• jump code - this is one hex digit
• operand - this is two hex digits

Thus all in all there are 4 hex digits = 2 bytes.

They are put together into an ML instruction as follows:

1. The escape code E goes first - it is the first (leftmost) hex digit of the instruction
2. The jump code goes next - it is the second hex digit of the instruction.
3. The operand code goes last - it gives the third and fourth hex digits of the instruction.

For example, consider coding the following AL instruction:

jlt 45

First, you must work out the individual hex codes for the parts of the instruction:

1. The AL opcode is jlt. Consulting the jump code table, you find out its ML code is 9.
2. The AL operand code is 45. But that is decimal. For ML it needs to be translated into hex. You get 2D₁₆ as the base 16 translation of the decimal 45. These two digits become the third and fourth digits of the ML instruction.

Summarizing this work you have:

Thus the translation of the AL instruction

jlt 45

into ML is:

E9 2D

which is the information in the leftmost column of the work table above.

Miscellaneous (Section 8)

The remaining instructions to be covered all have 0 as their first hex digit - this distinguishes them from all of the previous instructions. Currently these instructions fall into three categories:

       The halt instruction..
       The basic input output instructions
       The microcoded input output instructions.

The halt Instruction (8.1)

This instruction stops the controller from fetching and executing instructions - thus effectively halting the computer. It is the only instruction with a one byte code instead of the usual two bytes. That one byte is just 00.

The Basic IO Instructions (8.2)

Input output devices are controlled by data stored in memory cells in the device adapter . These memory cells are called registers - in analogy with the registers in the CPU. These registers are also known as IO ports.

The ECTC can access up to 16 different ports numbered from #0 to #15 (decimal). Some IO devices use more than one port.

For example, the ECTC Terminal has three ports which can be seen at the bottom of the simulated display of the terminal.:

• port #0 is the display port. Any Ascii character copied to this port will cause the corresponding graphic symbol to appear in the Terminal display.
• port #1 is the keyboard status port. When a key on the terminal is pressed, the value 1 is set into the righthand hex digit of this port. If a second key is pressed before the first key is copied by the CPU, then the value 8 is set into the lefthand digit of this port to indicate keyboard overflow.
• part #2 is the keyboard value port. When a key on the terminal is pressed, the Ascii code for that key is set into the port. When this value is copied into a CPU register, the value 00 is set into the status port (#1) to show that the key has been acknowledged by the CPU.

The value in a port can be transferred (i.e. copied) into a CPU register via an input instruction. Similarly the value in a CPU register can be transferred into a port via an output instruction. Collectively input and output instructions are called IO instructions.

An IO instruction is composed of four pieces of information each represented by a code number:

• The hex digit 0 signalling miscellaneous instructions
• A 3 meaning input or a 4 meaning output
• A hex digit specifying what register to use - known as the register code
• A hex digit specifying the number of the IO port.

For example, coding the AL instruction:

in x,12

First, you must work out the individual hex codes for the parts of the instruction:

1. The first hex digit is 0.
2. The second digit is 3 because it is an input instruction.
3. Consulting the programmable register code table, we find the register code for x is 2.
4. The port is #C. Note that 12 was decimal, but ML needs hexidecimal.

Summarizing this work we have:

Thus the translation of the AL instruction

in x,12

into ML is:

03 2C

which is the information in the leftmost column of the work table above. What this instruction would do is copy the information from port #12 into the x register.

The coding of an output instruction is entirely similar - except that the second digit is 4 instead of 3. Thus the AL instruction:

out fg,7

would be coded in ML as:

04 67

The Microcode IO Instructions (8.3)

This class of instruction provides access to "micro code" in the controller which provides fairly elaborate I/O operations.

This feature was designed into the ECTC hardware because the ECTC memory is not very large and an operating system (the programs that would normally provide more complex IO operations by means of ML procedures) would use up much of that space.

Thus each IO System Call instruction is placed into your program as a single ML instruction - but when executed actually calls an elaborate series of programmed steps inside the controller.

The ECTC simulated terminal is only 40 characters wide by 16 lines deep. It is simulated by a window in the ECTC simulator.

The only video control characters that the ECTC simulated terminal recognizes are:

• 10 = '\n' = line feed: This causes the cursor to position itself at the left end of the next line down. This will cause the simulated terminal to scroll up if done on the last line.
• 12 = form feed: This causes the simulated terminal to clear and the cursor to move to the upper left hand corner.

The ECTC keyboard is simulated by the host PC keyboard. However, for this simulation to be active, the user must have clicked in the simulated terminal window so that a little keyboard icon appears in the lower left of that window.

The following I/O System Call instructions have been provided in assembly language (machine language follows as a comment). They all transfer information in or out of register a only. Thus the other registers cannot be used with these instructions.

• sysc 0 ( ML 06 00 )
  This instruction waits for the user to press a key on the keyboard and then places its ASCII code in register a.
  This is analogous to the a = getchar() command in a C program.
• sysc 1 ( ML 06 01 )
  This instruction sends the ASCII code from register a to the simulated terminal. This may either be displayed as a graphic symbol or recognized as a control character as is appropriate.
  This is analogous to the putchar(a) command in a C program.
• sysc 3 ( ML 06 03 )
  This instruction outputs a series of ASCII codes from the ECTC memory to the simulated terminal. The first code of the series comes from the memory cell whose address is in register a. The remaining codes come from successively higher addresses until a memory cell is reached whose content is zero. That zero code is NOT sent to the terminal. The content of register a is left unchanged.
  This is analogous to the puts(a) command in a C program.
• sysc 4 ( ML 06 04 )
  This instruction scans a signed decimal integer from the simulated keyboard and converts it to a binary number which is placed into register a. It also reads and discards the first non numeric character following the integer - normally a space, comma, or return key.
  This is analgous to the scanf("%d%c",&a,&discard) command in a C program.
• sysc 5 ( ML 06 05 )
  This instruction converts the binary content of register a to a signed decimal number and outputs its digits as individual ASCII codes to the simulated terminal. However, it does print leading zeros.
  This is analogous to the printf("%05d",a) command in a C program.

Copyright © 1998,2001 Dr. James F. Wirth